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Low latency systems (such as tick-to-trade engines) require FPGA decision making logic to connect to Ethernet networking endpoints. These connections depend on absolute minimum latency, but must fully support Ethernet specification.Many organizations already have extensive FPGA based deployments, but wish to make use of ultra-low latency PCS/MAC IP. The ExaMAC provides the same IP found in our integrated low latency solutions such as the ExaLINK Fusion switch and ExaNIC network adapters, but packaged as a stand-alone IP core for Xilinx based FPGAs.